As the demand for smaller electronic products grows, manufacturers and others in the electronics industry continually seek ways to reduce the size of integrated circuits used in the electronic products. In that regard, three-dimensional type integrated circuit packaging techniques have been developed and used.
One packaging technique that has been developed is Package-on-Package (PoP). As the name implies, PoP is a semiconductor packaging innovation that involves stacking one package on top of another package. A PoP device may combine vertically discrete memory and logic ball grid array (BGA) packages. In PoP package designs, the top package may be interconnected to the bottom package through peripheral solder balls.
Another packaging technique that has been developed is Fan-in Package-on-Package (FiPoP). A FiPoP device may incorporate multiple logic, analog, and memory devices in the bottom package. The FiPoP device structure permits smaller top packages (e.g., memory packages) to be mounted to the bottom package using center ball grid array patterns on the top package.